Typical IC Fabrication Process Steps

CMOS Technology Categories:-

1. Submicron: L >= 350 nm
2. Deep Submicron: 100 nm <= L <= 350 nm
3. Ultra Deep Submicron: L <= 100 nm

Basic steps for CMOS submicron fabrication process includes:-

> Oxidation: Process by which a silicon oxide layer is grown over the surface of a silicon wafer. Used to provide isolation between layers and protect the contamination of underlying layers.

Thin Oxide (100 - 1000 Å) is grown using dry oxidation techniques whereas thick oxide (> 1000 Å) is grown using a wet oxidation process.

> Diffusion: Movement of impurity atoms at the surface of the silicon to the bulk of silicon (i.e. moving from high concentration to lower concentration).

*Operating temperature: 800 to 1400 C

> Ion Implantation: Impurity ions are accelerated to a high velocity and is physically bombarded or lodged into the target material. Operates at a lower temperature compared to diffusion. Used for achieving a unique doping profile.

> Deposition: Process by which various materials are deposited on the silicon wafer (e.g. Poly, SiO2, Al, Si3N4). Some of the ways to deposit material on the substrate:

• Chemical Vapour Deposition (CVD)
• Low-Pressure Chemical Vapour Deposition (LPCVD)
• Plasma-Assisted Chemical Vapour Deposition (PACVD)
• Sputter Deposition 

> Etching: Process of selectively removing a layer of material. An etchant is used to remove the desired material.

Wet etch uses chemicals whereas dry etch used chemically active ionized gases.

> Epitaxy: Formation of a layer of single-crystal silicon on the surface of the silicon material so that crystal structure is consistent across the interface.

> Photolithography: Technique by which the above-mentioned process is applied to selected areas of the silicon wafer. 

• Apply photoresist.
• Soft-bake.
• Expose the photoresist to UV light through a mask.
• Remove unwanted photoresist using a solvent.
• Hard-bake.
• Remove photoresist.

**Positive Photoresist: Areas exposed to UV light are soluble in the developer. 

**Negative Photoresist: Areas not exposed to UV light are soluble in the developer.

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> Printing: Exposing selected area to light using photo-mask is called the printing process.

Types: Contact, Proximity, Projection printing.

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> Planarization: Minimize wafer surface variations. CMP (Chemical Mechanical Polishing) method is used for modern submicron technology for planarization.

> Silicide/Salicide technology: Used to reduce interconnect resistivity. Provide low resistance source/drain and poly connections.