Shallow Trench Isolation (STI)

• Isolation technique to prevent current leakage between adjacent semiconductor device.
• Hence, prevents latch-up.
• MOSFET's are also called self-isolating devices but as the transistor size decreases the use of reverse bias pn-junction to isolate transistor becomes impractical.
• STI allows closer spacing of transistors.
• In scenarios as n+ & p+ spacing gets smaller, birds beak shape characteristic is formed which leads to undesirable stress effects in the transistor. 
• STI has the advantage of minimizing the heat cycle needed for n+ and p+ isolation.
• Additionally, it also reduces substrate noise coupling.